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AMD may be playing chiplet Jenga with its next-gen server chips

Author : doriscable71254
Publish Date : 2021-05-25 12:50:59
AMD may be playing chiplet Jenga with its next-gen server chips

Here's a glimpse of the future: AMD is said to be working on a datacentre CPU that uses stacked dies, actual compute chiplets, one on top of the other, for potentially huge core density or inter-core bandwidth.

Two prominent AMD leakers (@patrickschur_ and @execufix) have posted word of the new chip, known as Milan-X. For reference, Milan is the codename for AMD's latest Epyc server chips, based on the Zen 3 architecture.

    AMD is working on a new CPU (codename Milan-X) that will use stacked dies.
Does that mean Zen 3 will see a stacked revamp sometime in the future, or is the Milan part less of a direct reference to Zen 3 in the datacentre and more so the Epyc chip generation? Rumours suggest Zen 3 will likely play some role in the new stacked chips. 

Either way, it's a seriously exciting prospect, even if it's not destined for our gaming PCs yet. 
I say yet because surely stacked dies will eventually worm into our gaming rigs. It makes sense to crank up core counts in datacentres first and foremost with this technology, but with AMD and Intel both looking at 3D stacking technologies it seems inevitable even on desktop.

The latest Epyc Milan processors offer up to 64 Zen 3 cores, divided between eight compute chiplets and all connected to a central I/O chip. Stacked dies, even fewer of them, could produce much high core counts, if that was indeed the plan, although Videocardz says its sources are citing the shift as a move to increase bandwidth.

Stacked chips can be much closer to each other than many chips side-by-side, and can be connected up to one another inherently through the 3D packaging process, through technologies such as Through Silicon Vias, or TSVs. Thus, more bandwidth is available, and potentially lower latencies between cores, too.

Intel is also working on innovative packaging technologies, and its Intel Xe HPC chip, Ponte Vecchio, uses multiple 3D stacked (Foveros) dies.
Here's a glimpse of the future: AMD is said to be working on a datacentre CPU that uses stacked dies, actual compute chiplets, one on top of the other, for potentially huge core density or inter-core bandwidth.

Two prominent AMD leakers (@patrickschur_ and @execufix) have posted word of the new chip, known as Milan-X. For reference, Milan is the codename for AMD's latest Epyc server chips, based on the Zen 3 architecture.

    AMD is working on a new CPU (codename Milan-X) that will use stacked dies.
Does that mean Zen 3 will see a stacked revamp sometime in the future, or is the Milan part less of a direct reference to Zen 3 in the datacentre and more so the Epyc chip generation? Rumours suggest Zen 3 will likely play some role in the new stacked chips. 

Either way, it's a seriously exciting prospect, even if it's not destined for our gaming PCs yet. 
I say yet because surely stacked dies will eventually worm into our gaming rigs. It makes sense to crank up core counts in datacentres first and foremost with this technology, but with AMD and Intel both looking at 3D stacking technologies it seems inevitable even on desktop.

 

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